Conventional techniques of constituting a static random access memory (SRAM) using a tunnel transistor, which operates under low-voltage, are known. The tunnel transistor can operate under low-voltage and has unique property such as its small leakage current during the off-state. However, a small drain current during the on-state causes the tunnel transistor to saturate under a voltage where the drain current is relatively low. Under a low drain current, the driving ability is low, and thus the operating speed of the semiconductor storage device is low. Provision of a semiconductor storage device making better use of the property of the tunnel transistor is desired.